FIG. 1 shows an image sensor known especially from the document D1 (US 2006/0103747). The sensor has a photodiode 101, a transfer transistor having a transfer gate 150, a floating node 107, and a means 103, 109, 111, 113 of reading the floating node. The photodiode 101 has an N− type accumulation region 110 (called a “shallow region” in D1) in a P− type region 120 of a substrate or directly on a P− substrate, and a P+ type very shallow pinning region 160 (called a “pinning layer” in D1) situated above the shallow region. The regions 110 and 160 are limited on one side by an isolation region 130 and on the other side by a vertical plane passing through a flank 140 of the gate 150. The interface between the region 160 and the region 110 forms a first PN junction and the interface between the region 110 and the substrate forms a second PN junction.
The working of such a diode comprises an accumulation phase and a transfer phase. During the accumulation phase, a ground potential is applied to the P region 120 (substrate) and to the P+ region 160 and a reverse bias potential Vd is applied to the N− region 110. When photons strike an upper surface 118 of the diode, electron-hole pairs are generated in the diode, more specifically in the regions 160, 110, 112, 120, and the electrons here are stored in the N region 110. During the transfer phase, the gate 150 of the transfer transistor is turned on and the electrons generated by photo-emission are transferred to the floating node 107 whose content can then be read by the reading means.
The depth of the regions 110, 160 and the N, P dopant concentrations in these regions are chosen so that, when the charge transfer is complete, the gate of the transfer transistor being on (the potential Vp is applied to the N type region 110), the space charge zones of the two diodes meet. Thus, during the accumulation phase, the gate of the transfer transistor being off, no majority carrier can be extracted from the region 110. Such a diode is called a pinned diode or fully depleted diode.
One problem with a diode according to FIG. 1 is its limited storage capacity.
The document D1 proposes to increase the storage capacity of such a diode by making the N− region by implantation of two N− type dopants having different coefficients of diffusion and different densities of concentration (FIG. 2 of D1), the implantation zone of the first dopant 112 surrounding the implantation zone of the second dopant 114.
The invention also seeks to increase the storage capacity of a prior art diode by proposing an alternative to the solution of D1.